Università degli Studi di Napoli "Parthenope"

  1. Teaching
  2. COMPUTER SCIENCE, BIOMEDICAL AND TELECOMMUNICATIONS ENGINEERING
  3. ARCHITECTURE OF MICROPROCESSOR SYSTEMS

Stampa

ARCHITECTURE OF MICROPROCESSOR SYSTEMS

Teaching schedule

Academic year: 
2014/2015
Belonging course: 
Course of Bachelor's Degree Programme on COMPUTER SCIENCE, BIOMEDICAL AND TELECOMMUNICATIONS ENGINEERING
Disciplinary sector: 
INFORMATION PROCESSING SYSTEMS (ING-INF/05)
Language: 
Italian
Credits: 
9
Year of study: 
3
Teachers: 
Dott. COPPOLINO Luigi
Cycle: 
Second semester
Hours of front activity: 
72

Language

Italian

Course description

Knowledge and understanding: i) internal organization of microprocessor based systems; ii) analysis and design of embedded systems.
Applying knowledge and understanding: I) design and programming of microprocessor based systems; ii) design and implementation of embedded systems.
Making judgements: evaluation and comparison of microprocessor based system.
Learning skills: i) consulting reference literature; ii) searching and consulting online databases and repositories; iii) continuous updating of gathered knowledge
Communication skills: i) mastery of the jargon with respect to the course topics; ii) team working

Prerequisites

Knowledge of Computer Programming and Digital Circuits is beneficial.

Syllabus

Instruction Set Architecture (8 h):
Memory locations and Addresses; Memory Operations; Instruction and Instruction Sequencing; Addressing Modes; Asembly Language; Stacks; Subroutines; Additional Instructions (Logic/Shift-Rotate/Multiplication and Division).
Software (2 h):
The Assembly process, two pass assembler; Loading and Executing Object Programs; The Linker; Libraries; The Compiler; The Debugger.
CISC Instruction set and RISC Style (24 h):
ARM, Motorola and Intel case studies.
Basic INPUT/OUTPUT (6 h):
I/O Device Interface; Program Controlled I/O, Interrupts; ARM, Motorola and Intel case studies.
The Memory System (6 h):
Basic Concepts; Types of Memories; Memory Hierarchy; Direct Memory Access; Cache Memories; Performance Considerations; Virtual Memory; Memory Management Requirements; Secondary Storage.
Basic Processing Unit (6 h):
Instruction Execution; Hardware components; Instruction Fetch and Execution; Control Signals; Hardwired and Microprogrammed Control.
Pipelining (4 h):
Introduction to pipeline organization and Data Dependencies.
Embedded Systems (16 h):
Example of Embedded Systems; Microcontroller Chips for Embedded Applications; Organization of a Microcontroller; Microcontroller Families, Design Issues. System-on-a-Chip.

The ARM, Motorola, and Intel processor families; Embedded Systems; System-on-a-Chip Design.

Teaching Methods

Classes will be given in a multimedia room and will alternate theoretical aspects and their applications. Team building and working will be encouraged.
Traditional classroom lessons will be combined with online digital contents and lessons provided as e-learning. E-learning study material is provided in Italian.

Textbooks

Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Computer Organization and Embedded Systems,Sixth Edition, McGraw-Hill Higher Education, 2011, ISBN-10: 0073380652.

Learning assessment

Homework will be continuously proposed to enable auto-evaluation of students’ knowledge. The final exam will include a practical assessment (related to two of the three architectures presented during the course) and a final discussion (only for those who pass the practical assessment).

More information

Attending classes is strongly suggested
E-learning contents will be provided at the edi.uniparthenope.it address. At the same platform free material produced by the instructor will be made available.
Homework will be continuously proposed to enable auto-evaluation of students’ knowledge. The final exam will include a practical assessment (related to two of the three architectures presented during the course) and a final discussion (only for those who pass the practical assessment).